Unconventional Computing in a Scaled CMOS Platform

Presentation abstract: "Unconventional Computing in a Scaled CMOS Platform" presentation will discuss the integration of novel devices and functions into a state-of-the-art CMOS manufacturing process. Both classical and quantum extensions to the conventional CMOS computing platform will be discussed. For the last decade, our group has worked to design and implement photonic interconnects into mature CMOS computing platforms. We have been motivated by the limitations on classical multicore computer architectures imposed by the latency and energy intensity of memory access. Recently, we have reported the first sub-systems employing these novel photonic components to realize optical transmitters and receivers monolithically integrated with microprocessors (Nature 2015). The development of highly integrated WDM systems has the potential to relieve congestion at critical points in high-performance computing and data center applications.

The ability to embed optical waveguides, resonators, and photodetectors into a large-scale computing infrastructure presents an opportunity for quantum information processing.  It is now well established that any large-scale quantum processor will require significant classical computing resources for control and error-correction. We have recently embarked on a quest to develop a CMOS toolkit for trapped ion based quantum information processing. This platform brings together the largest scale quantum computing platform (trapped ions) with large scale classical computing.  We have demonstrated stable ion-trapping using chips fabricated in a high-performance CMOS logic process. We have developed an architecture that integrates CMOS single-photon counting detectors, waveguide based visble beam-forming optics (Nature Nano 2016), and locally synthesized optical pulses to realize a platform for scalable quantum information processing.

Date: July 7th, 2017

Time: 11 a.m.

Location: Teleensenyament Room, B3 building - 1st floor, North Campus UPC

Bio or Prof. Rajeev J. Ram:
Rajeev J. Ram has worked in the areas of physical optics and electronics for much of his career.

In the early 1990’s while a graduate student at UCSB, he developed the III-V wafer bonding technology that led to record brightness light emitting devices at Hewlett-Packard Laboratory in Palo Alto. 

While at HP Labs, he worked on the first commercial deployment of vertical cavity surface emitting lasers. 

In the early 1990′s, he developed the first semiconductor laser without population inversion, semiconductor lasers that employ condensation of massive particles (polariton lasers), and threshold-less lasers.

Since 1997, Ram has been on the Electrical Engineering and Computer Science faculty at the Massachusetts Institute of Technology (MIT) and a member of the Research Laboratory of Electronics.

He has served on the Defense Sciences Research Council advising DARPA on new areas for investment and served as a Program Director at the newly founded  Advanced Research Project Agency-Energy.

His group at MIT has developed energy-efficient photonics for microprocessor systems, microfluidic systems for the control of cellular metabolism, and the first light-source with greater than 100% electrical-to-optical conversion efficiency. 

He is a MacVicar Faculty Fellow, a Bose Research Fellow at MIT, and a Fellow of the Optical Society of America and IEEE Fellow.